Top Posts

• [Top] Feb 12, 2023

  Understanding Redis Source Code

• [Top] Nov 20, 2022

  Cheat Sheet for Building and Deploying SPEC

• [Top] Mar 9, 2022

  QEMU Cheat Sheet for Full-System Simulation

• [Top] Jan 22, 2020

  Understanding Discrete Event Contention Simulation in zSim

• [Top] Jan 9, 2020

  Understanding Cache Coherence Concurrency Control Protocol in zSim

• [Top] Jan 1, 2020

  Understanding Processor Microarchitecture Simulation in zSim

• [Top] Dec 25, 2019

  Understanding Cache System Simulation in zSim

• [Top] Mar 16, 2018

  Adding Dynamic Github Contribution Calendar To Your Static Page

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Posts

• [Paper Review] Dec 23, 2020 , Paper published in ISCA 2020

  HOOP: Efficient Hardware-Assisted Out-of-Place Update for Non-Volatile Memory

  Keyword: NVM; Redo Logging; HOOP
• [Paper Review] Dec 22, 2020 , Paper published in ISCA 2020

  Buddy Compression: Enabling Large Memory for Deep Learning and HPC Workloads on GPU

  Keyword: Compression; GPU Compression Buddy Compression
• [Paper Review] Dec 21, 2020 , Paper published in ISCA 2009

  InvisiFence: Performance-Transparent Memory Ordering in Conventional Multiprocessors

  Keyword: Microarchitecture; Store Buffer; Memory Consistency
• [Paper Review] Dec 18, 2020 , Paper published in MICRO 2020

  Boosting Store Buffer Efficiency with Store-Prefetch Bursts

  Keyword: Microarchitecture; Store Buffer
• [Paper Review] Dec 15, 2020 , Paper published in MICRO 2020

  Improving the Utilization of Micro-Operation Caches in x86 Processors

  Keyword: Microarchitecture; uop cache

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