Top Posts

• [Top] Feb 12, 2023

  Understanding Redis Source Code

• [Top] Nov 20, 2022

  Cheat Sheet for Building and Deploying SPEC

• [Top] Mar 9, 2022

  QEMU Cheat Sheet for Full-System Simulation

• [Top] Jan 22, 2020

  Understanding Discrete Event Contention Simulation in zSim

• [Top] Jan 9, 2020

  Understanding Cache Coherence Concurrency Control Protocol in zSim

• [Top] Jan 1, 2020

  Understanding Processor Microarchitecture Simulation in zSim

• [Top] Dec 25, 2019

  Understanding Cache System Simulation in zSim

• [Top] Mar 16, 2018

  Adding Dynamic Github Contribution Calendar To Your Static Page

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Posts

• [Paper Review] Jun 14, 2020 , Paper published in MICRO 2014

  Skewed Compressed Caches

  Keyword: Compression; Cache Tags; Skewed Cache
• [Paper Review] Jun 13, 2020 , Paper published in MICRO 2013

  Decoupled Compressed Cache: Exploiting Spatial Locality for Energy-Optimized Compressed Caching

  Keyword: Compression; Cache Tags; DCC
• [Paper Review] Jun 12, 2020 , Paper published in TVLSI 2010

  C-Pack: A High-Performance Microprocessor Cache Compression Algorithm

  Keyword: Compression; Cache Tags; C-Pack
• [Paper Review] Jun 11, 2020 , Paper published in ISCA 2016

  Base-Victim Compression: A Opportunistic Cache Compression Architecture

  Keyword: Compression; Cache Tags; Base-Victim
• [Paper Review] Jun 10, 2020 , Paper published in ISCA 2020

  MorLog: Morphable Hardware Logging for Atomic Persistence in Non-Volatile Main Memory

  Keyword: Logging; Undo Log; Redo Log; MorLog

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