Top Posts

• [Top] Feb 12, 2023

  Understanding Redis Source Code

• [Top] Nov 20, 2022

  Cheat Sheet for Building and Deploying SPEC

• [Top] Mar 9, 2022

  QEMU Cheat Sheet for Full-System Simulation

• [Top] Jan 22, 2020

  Understanding Discrete Event Contention Simulation in zSim

• [Top] Jan 9, 2020

  Understanding Cache Coherence Concurrency Control Protocol in zSim

• [Top] Jan 1, 2020

  Understanding Processor Microarchitecture Simulation in zSim

• [Top] Dec 25, 2019

  Understanding Cache System Simulation in zSim

• [Top] Mar 16, 2018

  Adding Dynamic Github Contribution Calendar To Your Static Page

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Posts

• [Paper Review] Jul 30, 2022 , Paper published in MICRO 2021

  Trident: Harnessing Architectural Resources for All Page Sizes in x86 Processors

  Keyword: TLB; Huge Page; Virtual Memory; Trident; THP
• [Paper Review] Jul 28, 2022 , Paper published in ASPLOS 2022

  Software-Defined Address Mapping: A Case on 3D Memory

  Keyword: 3D Memory; HBM; HMC; DRAM; SDAM
• [Paper Review] Jul 24, 2022 , Paper published in ASPLOS 2022

  EveryWalk’s a Hit: Making PageWalks Single-Access Cache Hits

  Keyword: TLB; Virtual Memory; Page Walk
• [Paper Review] Jul 20, 2022 , Paper published in ISCA 2022

  Free Atomics: Hardware Atomic Operations without Fences

  Keyword: Load Queue; Store Queue; Atomics; Memory Consistency
• [Paper Review] Jul 19, 2022 , Paper published in ISCA 2022

  Lukewarm serverless functions: characterization and optimization

  Keyword: Serverless; Prefetching; Jukebox; Function Keep-Alive; Instruction Cache

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